Add a device tree for th HiFive Unleashed that includes the Microsemi
PCIe root complex.
Once we have support for u-boot and in tree Linux kernel device trees
this device tree should be removed.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
We expect the payloads to be 4 bit alligned as we later AND them
with ~0xf. As most of the addresses are manually specified we don't
really need this, but better to be over cautious.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
On Makefile merge_objs calls ld without providing any hints
on the target so on a multilib toolchain for example it will
always pick the default one (elf64-littleriscv) which will
then result a failure when compiling on RV32 since the objects
will be 32bits and the target will be 64bits. The same happens
on compile_ld that calls gcc without CFLAGS so it doesn't
get mabi/march.
With this patch OpenSBI compiles on RV32 (PLATFORM_RISCV_XLEN=32),
I tested fw_jump.elf on qemu (but it doesn't boot the kernel yet
-bbl also doesn't boot the kernel so it may be something else).
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.
Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.
Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
This patch introduces following optional PLATFORM options:
PLATFORM_RISCV_XLEN -> RISC-V register width
PLATFORM_RISCV_ABI -> RISC-V GCC ABI
PLATFORM_RISCV_ISA -> RISC-V GCC ISA string
PLATFORM_RISCV_CODE_MODEL -> RISC-V GCC Code Model
If the above options are not provided by platform config.mk
or by command-line parameters then:
1. PLATFORM_RISCV_XLEN will be determined using toolchain
capability
2. PLATFORM_RISCV_ABI, PLATFORM_RISCV_ISA, and
PLATFORM_RISCV_CODE_MODEL is set to value best suited for
generic libsbi.a
As a result of these optional PLATFORM options, the
platform-cflags-y and platform-asflags-y is further
simplified for platform config.mk.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The current 4MB aligned FW_JUMP_ADDR and FW_PAYLOAD_OFFSET breaks
U-Boot on QEMU virt and sifive_u machines.
Instead of using 4MB aligned for both 32bit and 64bit systems, we
use different values based compiler XLEN. Another advantage of this
approach will be that our fw_payload.bin will smaller for 64bit
systems.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Both FW_JUMP_ADDR and FW_PAYLOAD_OFFSET, should be:
1. 4MB aligned for 32bit system
2. 2MB aligned for 64bit system
Explicitly specify the above details in config.mk comments
for template platform.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
This fixes errors like this:
undefined reference to `__umoddi3'
when buildilng for 32-bit systems
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
csr_val is a tartget length based variable, so on 32-bit devices it's
only 32-bits. To avoid clearing the entire register perform both steps
in a single line.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
In order to support 32-bit guests move the start address to a 4MB
allignment. As 64-bit kernels have a requirement on being 2MB alligned
let's just make this the default for both 32 and 64 bit kernels.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
In order to support 32-bit guests move the start address to a 4MB
allignment. As 64-bit kernels have a requirement on being 2MB alligned
let's just make this the default for both 32 and 64 bit kernels.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
The QEMU virt machine can be either 32 or 66 bit. Don't hard code the
CPU bit length and instead let the compiler determine it.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Turns out it doesn't behave as expected on MacOS, it doesn't honor
-n and echoes that to the file instead. Add a slash and just let
the newline be there instead.
Signed-off-by: Olof Johansson <olof@lixom.net>
Some toolchains might not have all the CSRs available (as seen with
GCC 7.2). So, instead use the defined CSR_ values.
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch updates doxygen config file to include
docs/platform_guide.md and docs/library_usage.md in
generated PDF document.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Currently, only hart 1 is enabled for fu540 platform to support U-boot.
Introduce a compile time FU540_ENABLED_HART_MASK option so that specific
harts can be selected for booting. As fu540 is a multicore, we should
boot all cores by default except hart 0.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Currently, the OpenSBI version is in top-level Makefile so
firmware linking to OpenSBI static library have no-way to
know OpenSBI version.
This patch moves OpenSBI version from top-level Makefile to
sbi/sbi_version.h header which provides OPENSBI_VERSION_MAJOR
and OPENSBI_VERSION_MINOR defines.
NOTE: the SBI spec (or SBI ecall interface) version is
different. The SBI spec version is provided by functions
sbi_ecall_version_major() and sbi_ecall_version_minor().
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Provide an overview of all supported firmware files and point to each
firmware type documentation file.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Explicitely mention that this project adheres to the Developer
Certificate of Origin (DCO) and include this short text.
Also reformat the file to have lines bounded at 80 chars and add some
more details regarding the expected commit message format.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Also make sure that this file contains only the official BSD 2-clause
license text, nothing else.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
This patch updates copyright header in all files as follows:
1. Makes "SPDX-License-Identifier: BSD-2-Clause" as first line
2. Change copyright year to 2019 for Western Digital
Signed-off-by: Anup Patel <anup.patel@wdc.com>
For better naming, we rename ipi_inject() to ipi_send() in
struct sbi_platform. We also replace term "inject" with
"send" in all related places.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
It is not necessary that platform has MMIO-based timer value
register. It can also have some custom (implementation specific)
CSR for timer value.
This patch renames SBI_PLATFORM_HAS_MMIO_TIMER_VALUE to
SBI_PLATFORM_HAS_TIMER_VALUE to imply "platform timer value"
instead of "mmio timer value".
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The target_hart and hartid paramter of TIMER callbacks is not
required because it always current hartid which can be obtained
using sbi_current_hartid() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The hartid parameter in IRQCHIP callbacks of sbi_platform
is not required because current hartid can be determined
using sbi_current_hartid() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
