Yu Chien Peter Lin d162009612 docs: pmu: Add Andes PMU node example ... Add PMU node example for event index to counter index mapping and selector value translation of Andes' CPUs. Currently, there are 4 HPM counters that can be used to monitor all of the events for each hart. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Locus Wei-Han Chen <locus84@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>		2023-12-06 18:21:25 +05:30
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external	doc: coreboot: Fix doc styles	2020-02-18 09:03:52 +05:30
firmware	doc: Fix fw_payload.md	2023-10-06 10:07:48 +05:30
platform	utils/reset: Remove fdt_reset_thead	2023-11-16 16:25:23 +05:30
contributing.md	docs: fix some typos	2022-11-14 22:21:31 +05:30
domain_support.md	platform: generic: Add system suspend test	2023-02-27 19:50:51 +05:30
doxygen.cfg	docs: Add initial documentation for domain support	2020-10-21 12:29:36 +05:30
library_usage.md	docs: Fix some typos	2022-10-13 09:28:54 +05:30
platform_guide.md	docs: Update documentation for kconfig support	2022-08-08 09:34:31 +05:30
platform_requirements.md	docs: platform: update platform_requirements.md	2023-10-06 17:58:09 +05:30
pmu_support.md	docs: pmu: Add Andes PMU node example	2023-12-06 18:21:25 +05:30
riscv_opensbi_logo_final_color.png	docs: Add OpenSBI logo and use it in the top-level README.md	2023-06-14 11:26:04 +05:30
riscv_opensbi_logo_final_grey.png	docs: Add OpenSBI logo and use it in the top-level README.md	2023-06-14 11:26:04 +05:30