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net: eth_designware: select PHYLIB in Kconfig
Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB from legacy board header files. This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE are selected. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reported-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Tested-by: Pavel Machek <pavel@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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parent
0780697787
commit
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11 changed files with 1 additions and 13 deletions
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@ -88,6 +88,7 @@ config ETH_SANDBOX_RAW
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config ETH_DESIGNWARE
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bool "Synopsys Designware Ethernet MAC"
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select PHYLIB
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help
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This MAC is present in SoCs from various vendors. It supports
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100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
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@ -22,10 +22,6 @@
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DECLARE_GLOBAL_DATA_PTR;
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#if !defined(CONFIG_PHYLIB)
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# error "DesignWare Ether MAC requires PHYLIB - missing CONFIG_PHYLIB"
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#endif
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static int dw_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
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{
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struct eth_mac_regs *mac_p = bus->priv;
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@ -95,7 +95,6 @@
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/*
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* Ethernet PHY configuration
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*/
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#define CONFIG_PHYLIB
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#define CONFIG_MII
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#define CONFIG_PHY_GIGE
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@ -75,7 +75,6 @@
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#define CONFIG_DW_ALTDESCRIPTOR
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#define CONFIG_CMD_MII
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#define CONFIG_MII
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#define CONFIG_PHYLIB
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/* i2c Settings */
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#define CONFIG_SYS_I2C
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@ -45,7 +45,6 @@
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/* 10/100M Ethernet support */
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#define CONFIG_DESIGNWARE_ETH
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#define CONFIG_DW_ALTDESCRIPTOR
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#define CONFIG_PHYLIB
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/* Environment configuration */
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#define CONFIG_ENV_SECT_SIZE 0x1000
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@ -109,7 +109,6 @@
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#define CONFIG_DW_ALTDESCRIPTOR
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#define CONFIG_MII
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#define CONFIG_AUTONEG_TIMEOUT (15 * CONFIG_SYS_HZ)
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_GIGE
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#endif
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@ -17,7 +17,6 @@
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/* Ethernet driver configuration */
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#define CONFIG_MII
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
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#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
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@ -53,7 +53,6 @@
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/* GMAC related configs */
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#define CONFIG_MII
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#define CONFIG_PHYLIB
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#define CONFIG_DW_ALTDESCRIPTOR
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#define CONFIG_PHY_MICREL
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@ -313,7 +313,6 @@ extern int soft_i2c_gpio_scl;
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#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
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#define CONFIG_PHY_ADDR 1
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#define CONFIG_MII /* MII PHY management */
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#define CONFIG_PHYLIB
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#endif
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#ifdef CONFIG_USB_EHCI_HCD
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@ -42,7 +42,6 @@
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/*
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* Ethernet PHY configuration
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*/
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_GIGE
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/*
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@ -77,7 +77,6 @@
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/* Ethernet config options */
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#define CONFIG_MII
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
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