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Merge pull request #27 from shalasaka/JH7100_Multimedia_V0.1.0_for_visionfive

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Add starfive visionfive board support at brach JH7100_Multimedia_V0.1.0
This commit is contained in:
andyhu-stf 2022-01-06 21:11:48 +08:00 • committed by GitHub
commit 31d6026d57
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GPG key ID: 4AEE18F83AFDEB23
108 changed files with 1337 additions and 35 deletions
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5
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
View file

@ -84,6 +84,7 @@ config ARCH_LS1043A
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
imply CMD_PCI
imply ID_EEPROM
config ARCH_LS1046A
bool
@ -117,6 +118,7 @@ config ARCH_LS1046A
select SYS_I2C_MXC_I2C2 if !DM_I2C
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
imply ID_EEPROM
imply SCSI
imply SCSI_AHCI
@ -158,6 +160,7 @@ config ARCH_LS1088A
select SYS_I2C_MXC_I2C3 if !TFABOOT
select SYS_I2C_MXC_I2C4 if !TFABOOT
select RESV_RAM if GIC_V3_ITS
imply ID_EEPROM
imply SCSI
imply PANIC_HANG
@ -210,6 +213,7 @@ config ARCH_LS2080A
select SYS_I2C_MXC_I2C4 if !TFABOOT
select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
imply ID_EEPROM
imply PANIC_HANG
config ARCH_LX2162A
@ -272,6 +276,7 @@ config ARCH_LX2160A
select SYS_I2C_MXC
select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
imply ID_EEPROM
imply PANIC_HANG
imply SCSI
imply SCSI_AHCI

1
arch/powerpc/cpu/mpc85xx/Kconfig
View file

@ -718,6 +718,7 @@ config ARCH_T2080
imply CMD_NAND
imply CMD_REGINFO
imply FSL_SATA
imply ID_EEPROM
config ARCH_T4240
bool

1
arch/riscv/dts/Makefile
View file

@ -12,6 +12,7 @@ dtb-$(CONFIG_JH_EVB_V1) += starfive_jh7100_evb.dtb
dtb-$(CONFIG_JH_STARLIGHT) += starfive_jh7100_starlight.dtb
dtb-$(CONFIG_JH_STARLIGHT) += jh7100-beaglev-starlight.dtb
dtb-$(CONFIG_JH_STARLIGHT) += jh7100-beaglev-starlight-a1.dtb
dtb-$(CONFIG_JH_STARLIGHT) += jh7100-visionfive.dtb
endif
targets += $(dtb-y)

32
arch/riscv/dts/jh7100-visionfive.dts Normal file
View file

@ -0,0 +1,32 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2021 Jianlong Huang <jianlong.huang@starfivetech.com> */
/dts-v1/;
#include "jh7100-beaglev-starlight.dts"
/ {
model = "StarFive VisionFive V1";
gpio-restart {
compatible = "gpio-restart";
gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
priority = <256>;
};
};
&gmac {
/delete-property/ snps,reset-gpios;
};
&gpio {
/* don't reset gpio mux for serial console and reset gpio */
starfive,keep-gpiomux = <13 14 63>;
};
&i2c0 {
eeprom_dev:eeprom@50 {
compatible = "atmel,24c04";
reg = <0x50>;
pagesize = <16>;
};
};

2
board/starfive/jh7100/Makefile
View file

@ -5,3 +5,5 @@
obj-y += jh7100.o
obj-y += jh_ptc.o
obj-$(CONFIG_ID_EEPROM) += jh7100-i2c-eeprom.o

734
board/starfive/jh7100/jh7100-i2c-eeprom.c Normal file
View file

@ -0,0 +1,734 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2021 Red Hat, Inc. All Rights Reserved.
* Written by Wei Fu (wefu@redhat.com)
*/
#include <common.h>
#include <command.h>
#include <env.h>
#include <i2c.h>
#include <init.h>
#include <linux/ctype.h>
#include <linux/delay.h>
//#include <u-boot/crc.h>
/*
* MAGIC_NUMBER_BYTES: number of bytes used by the magic number
*/
#define MAGIC_NUMBER_BYTES 4
/*
* SERIAL_NUMBER_BYTES: number of bytes used by the board serial
* number
*/
//#define SERIAL_NUMBER_BYTES 16
/*
* MAC_ADDR_BYTES: number of bytes used by the Ethernet MAC address
*/
#define MAC_ADDR_BYTES 6
/*
* MAC_ADDR_STRLEN: length of mac address string
*/
#define MAC_ADDR_STRLEN 17
/*
* Atom Types
* 0x0000 = invalid
* 0x0001 = vendor info
* 0x0002 = GPIO map
* 0x0003 = Linux device tree blob
* 0x0004 = manufacturer custom data
* 0x0005-0xfffe = reserved for future use
* 0xffff = invalid
*/
#define HATS_ATOM_INVALID 0x0000
#define HATS_ATOM_VENDOR 0x0001
#define HATS_ATOM_GPIO 0x0002
#define HATS_ATOM_DTB 0x0003
#define HATS_ATOM_CUSTOM 0x0004
#define HATS_ATOM_INVALID_END 0xffff
struct eeprom_hats_header {
char signature[MAGIC_NUMBER_BYTES]; /* ASCII table signature */
u8 version; /* EEPROM data format version */
/* (0x00 reserved, 0x01 = first version) */
u8 reversed; /* 0x00, Reserved field */
u16 numatoms; /* total atoms in EEPROM */
u32 eeplen; /* total length in bytes of all eeprom data */
/* (including this header) */
};
struct eeprom_hats_atom_header {
u16 type;
u16 count;
u32 dlen;
};
/**
* static eeprom: EEPROM layout for the StarFive platform I2C format
*/
struct starfive_eeprom_atom1_data {
u8 uuid[16];
u16 pid;
u16 pver;
u8 vslen;
u8 pslen;
uchar vstr[STARFIVE_EEPROM_ATOM1_VSTR_SIZE];
uchar pstr[STARFIVE_EEPROM_ATOM1_PSTR_SIZE]; /* product SN */
};
struct starfive_eeprom_atom1 {
struct eeprom_hats_atom_header header;
struct starfive_eeprom_atom1_data data;
u16 crc16;
};
struct starfive_eeprom_atom4_v1_data {
u16 version;
u8 pcb_revision; /* PCB version */
u8 bom_revision; /* BOM version */
u8 mac_addr[MAC_ADDR_BYTES]; /* Ethernet0 MAC */
};
struct starfive_eeprom_atom4_v1 {
struct eeprom_hats_atom_header header;
struct starfive_eeprom_atom4_v1_data data;
u16 crc16;
};
/* Set to 1 if we've read EEPROM into memory
* Set to -1 if EEPROM data is wrong
*/
static int has_been_read;
/**
* helper struct for getting info from the local EEPROM copy.
* most of the items are pointers to the eeprom_wp_buff.
* ONLY serialnum is the u32 from the last 8 Bytes of product string
*/
struct starfive_eeprom_info {
char *vstr; /* Vendor string in ATOM1 */
char *pstr; /* product string in ATOM1 */
u32 serialnum; /* serial number from in product string*/
u16 *version; /* custom data version in ATOM4 */
u8 *pcb_revision; /* PCB version in ATOM4 */
u8 *bom_revision; /* BOM version in ATOM4 */
u8 *mac_addr; /* Ethernet0 MAC in ATOM4 */
};
static struct starfive_eeprom_info einfo;
static uchar eeprom_wp_buff[STARFIVE_EEPROM_HATS_SIZE_MAX];
static struct eeprom_hats_header starfive_eeprom_hats_header_default = {
.signature = STARFIVE_EEPROM_HATS_SIG,
.version = FORMAT_VERSION,
.numatoms = 2,
.eeplen = sizeof(struct eeprom_hats_header) +
sizeof(struct starfive_eeprom_atom1) +
sizeof(struct starfive_eeprom_atom4_v1)
};
static struct starfive_eeprom_atom1 starfive_eeprom_atom1_default = {
.header = {
.type = HATS_ATOM_VENDOR,
.count = 1,
.dlen = sizeof(struct starfive_eeprom_atom1_data) + sizeof(u16)
},
.data = {
.uuid = {0},
.pid = 0,
.pver = 0,
.vslen = STARFIVE_EEPROM_ATOM1_VSTR_SIZE,
.pslen = STARFIVE_EEPROM_ATOM1_PSTR_SIZE,
.vstr = STARFIVE_EEPROM_ATOM1_VSTR,
.pstr = STARFIVE_EEPROM_ATOM1_PSTR
}
};
static struct starfive_eeprom_atom4_v1 starfive_eeprom_atom4_v1_default = {
.header = {
.type = HATS_ATOM_CUSTOM,
.count = 2,
.dlen = sizeof(struct starfive_eeprom_atom4_v1_data) + sizeof(u16)
},
.data = {
.version = FORMAT_VERSION,
.pcb_revision = PCB_VERSION,
.bom_revision = BOM_VERSION,
.mac_addr = STARFIVE_DEFAULT_MAC
}
};
//static u8 starfive_default_mac[MAC_ADDR_BYTES] = STARFIVE_DEFAULT_MAC;
/**
* is_match_magic() - Does the magic number match that of a StarFive EEPROM?
*
* @hats: the pointer of eeprom_hats_header
* Return: status code, 0: Yes, non-0: NO
*/
static inline int is_match_magic(char *hats)
{
return strncmp(hats, STARFIVE_EEPROM_HATS_SIG, MAGIC_NUMBER_BYTES);
}
/**
* calculate_crc16() - Calculate the current CRC for atom
* Porting from https://github.com/raspberrypi/hats, getcrc
* @data: the pointer of eeprom_hats_atom_header
* @size: total length in bytes of the entire atom
* (type, count, dlen, data)
* Return: result: crc16 code
*/
#define CRC16 0x8005
static u16 calculate_crc16(uchar* data, unsigned int size)
{
int i, j = 0x0001;
u16 out = 0, crc = 0;
int bits_read = 0, bit_flag;
/* Sanity check: */
if((data == NULL) || size == 0)
return 0;
while(size > 0) {
bit_flag = out >> 15;
/* Get next bit: */
out <<= 1;
// item a) work from the least significant bits
out |= (*data >> bits_read) & 1;
/* Increment bit counter: */
bits_read++;
if(bits_read > 7) {
bits_read = 0;
data++;
size--;
}
/* Cycle check: */
if(bit_flag)
out ^= CRC16;
}
// item b) "push out" the last 16 bits
for (i = 0; i < 16; ++i) {
bit_flag = out >> 15;
out <<= 1;
if(bit_flag)
out ^= CRC16;
}
// item c) reverse the bits
for (i = 0x8000; i != 0; i >>=1, j <<= 1) {
if (i & out)
crc |= j;
}
return crc;
}
/* This function should be called after each update to any EEPROM ATOM */
static inline void update_crc(struct eeprom_hats_atom_header *atom)
{
uint atom_crc_offset = sizeof(struct eeprom_hats_atom_header) +
atom->dlen - sizeof(u16);
u16 *atom_crc_p = (void *) atom + atom_crc_offset;
*atom_crc_p = calculate_crc16((uchar*) atom, atom_crc_offset);
}
/**
* dump_raw_eeprom - display the raw contents of the EEPROM
*/
static void dump_raw_eeprom(u8 *e, unsigned int size)
{
unsigned int i;
printf("EEPROM dump: (0x%x bytes)\n", size);
for (i = 0; i < size; i++) {
if (!(i % 0x10))
printf("%02X: ", i);
printf("%02X ", e[i]);
if (((i % 16) == 15) || (i == size - 1))
printf("\n");
}
return;
}
static int hats_atom_crc_check(struct eeprom_hats_atom_header *atom)
{
u16 atom_crc, data_crc;
uint atom_crc_offset = sizeof(struct eeprom_hats_atom_header) +
atom->dlen - sizeof(atom_crc);
u16 *atom_crc_p = (void *) atom + atom_crc_offset;
atom_crc = *atom_crc_p;
data_crc = calculate_crc16((uchar *) atom, atom_crc_offset);
if (atom_crc == data_crc)
return 0;
printf("EEPROM HATs: CRC ERROR in atom %x type %x, (%x!=%x)\n",
atom->count, atom->type, atom_crc, data_crc);
return -1;
}
static void *hats_get_atom(struct eeprom_hats_header *header, u16 type)
{
struct eeprom_hats_atom_header *atom;
void *hats_eeprom_max = (void *)header + header->eeplen;
void *temp = (void *)header + sizeof(struct eeprom_hats_header);
for (int numatoms = (int)header->numatoms; numatoms > 0; numatoms--) {
atom = (struct eeprom_hats_atom_header *)temp;
if (hats_atom_crc_check(atom))
return NULL;
if (atom->type == type)
return (void *)atom;
/* go to next atom */
temp = (void *)atom + sizeof(struct eeprom_hats_atom_header) +
atom->dlen;
if (temp > hats_eeprom_max) {
printf("EEPROM HATs: table overflow next@%p, max@%p\n",
temp, hats_eeprom_max);
break;
}
}
/* fail to get atom */
return NULL;
}
/**
* show_eeprom - display the contents of the EEPROM
*/
static void show_eeprom(struct starfive_eeprom_info *einfo)
{
printf("\n--------EEPROM INFO--------\n");
printf("Vendor : %s\n", einfo->vstr);
printf("Product full SN: %s\n", einfo->pstr);
printf("data version: 0x%x\n", *einfo->version);
if (1 == *einfo->version) {
printf("PCB revision: 0x%x\n", *einfo->pcb_revision);
printf("BOM revision: %c\n", *einfo->bom_revision);
printf("Ethernet MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n",
einfo->mac_addr[0], einfo->mac_addr[1],
einfo->mac_addr[2], einfo->mac_addr[3],
einfo->mac_addr[4], einfo->mac_addr[5]);
} else {
printf("Custom data v%d is not Supported\n", *einfo->version);
}
printf("--------EEPROM INFO--------\n\n");
}
/**
* parse_eeprom_info - parse the contents of the EEPROM
* If everthing gose right,
* 1, set has_been_read to 1
* 2, display info
*
* If anything goes wrong,
* 1, set has_been_read to -1
* 2, dump data by hex for debug
*
* @buf: the pointer of eeprom_hats_header in memory
* Return: status code, 0: Success, non-0: Fail
*
*/
static int parse_eeprom_info(struct eeprom_hats_header *buf)
{
struct eeprom_hats_atom_header *atom;
void *atom_data;
struct starfive_eeprom_atom1_data *atom1 = NULL;
struct starfive_eeprom_atom4_v1_data *atom4_v1 = NULL;
if (is_match_magic((char *)buf)) {
printf("Not a StarFive EEPROM data format - magic error\n");
goto error;
};
printf("StarFive EEPROM format v%u\n", buf->version);
// parse atom1(verdor)
atom = (struct eeprom_hats_atom_header *)
hats_get_atom(buf, HATS_ATOM_VENDOR);
if (atom) {
atom_data = (void *)atom +
sizeof(struct eeprom_hats_atom_header);
atom1 = (struct starfive_eeprom_atom1_data *)atom_data;
einfo.vstr = atom1->vstr;
einfo.pstr = atom1->pstr;
einfo.serialnum = (u32)hextoul((void *)atom1->pstr +
STARFIVE_EEPROM_ATOM1_SN_OFFSET,
NULL);
} else {
printf("fail to get vendor atom\n");
goto error;
};
// parse atom4(custom)
atom = (struct eeprom_hats_atom_header *)
hats_get_atom(buf, HATS_ATOM_CUSTOM);
if (atom) {
atom_data = (void *)atom +
sizeof(struct eeprom_hats_atom_header);
atom4_v1 = (struct starfive_eeprom_atom4_v1_data *)atom_data;
einfo.version = &atom4_v1->version;
if (*einfo.version == 1) {
einfo.pcb_revision = &atom4_v1->pcb_revision;
einfo.bom_revision = &atom4_v1->bom_revision;
einfo.mac_addr = atom4_v1->mac_addr;
}
} else {
printf("fail to get custom data atom\n");
goto error;
};
// everthing gose right
has_been_read = 1;
show_eeprom(&einfo);
return 0;
error:
has_been_read = -1;
dump_raw_eeprom(eeprom_wp_buff,
STARFIVE_EEPROM_HATS_SIZE_MAX);
return -1;
}
/**
* read_eeprom() - read the EEPROM into memory, if it hasn't been read yet
* @buf: the pointer of eeprom data buff
* Return: status code, 0: Success, non-0: Fail
* Note: depend on CONFIG_SYS_EEPROM_BUS_NUM
* CONFIG_SYS_I2C_EEPROM_ADDR
* STARFIVE_EEPROM_WP_OFFSET
* STARFIVE_EEPROM_HATS_SIZE_MAX
*/
static int read_eeprom(uint8_t *buf)
{
int ret;
struct udevice *dev;
if (has_been_read == 1)
return 0;
ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM,
CONFIG_SYS_I2C_EEPROM_ADDR,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
&dev);
if (!ret) {
ret = dm_i2c_read(dev, STARFIVE_EEPROM_WP_OFFSET,
buf, STARFIVE_EEPROM_HATS_SIZE_MAX);
}
if (ret) {
printf("fail to read EEPROM.\n");
return ret;
}
return parse_eeprom_info((struct eeprom_hats_header *)buf);
}
/**
* prog_eeprom() - write the EEPROM from memory
*/
static int prog_eeprom(uint8_t *buf, unsigned int size)
{
unsigned int i;
void *p;
uchar tmp_buff[STARFIVE_EEPROM_HATS_SIZE_MAX];
struct udevice *dev;
int ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM,
CONFIG_SYS_I2C_EEPROM_ADDR,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
&dev);
if (is_match_magic(buf)) {
printf("MAGIC ERROR, Please check the data@%p.\n", buf);
return -1;
}
for (i = 0, p = buf; i < size;
i += BYTES_PER_EEPROM_PAGE, p += BYTES_PER_EEPROM_PAGE) {
if (!ret)
ret = dm_i2c_write(dev,
i + STARFIVE_EEPROM_WP_OFFSET,
p, min((int)(size - i),
BYTES_PER_EEPROM_PAGE));
if (ret)
break;
udelay(EEPROM_WRITE_DELAY_MS);
}
if (!ret) {
/* Verify the write by reading back the EEPROM and comparing */
ret = dm_i2c_read(dev,
STARFIVE_EEPROM_WP_OFFSET,
tmp_buff,
STARFIVE_EEPROM_HATS_SIZE_MAX);
if (!ret && memcmp((void *)buf, (void *)tmp_buff,
STARFIVE_EEPROM_HATS_SIZE_MAX))
ret = -1;
}
if (ret) {
has_been_read = -1;
printf("Programming failed.Temp buff:\n");
dump_raw_eeprom(tmp_buff,
STARFIVE_EEPROM_HATS_SIZE_MAX);
return -1;
}
printf("Programming passed.\n");
return 0;
}
/**
* set_mac_address() - stores a MAC address into the local EEPROM copy
*
* This function takes a pointer to MAC address string
* (i.e."XX:XX:XX:XX:XX:XX", where "XX" is a two-digit hex number),
* stores it in the MAC address field of the EEPROM local copy, and
* updates the local copy of the CRC.
*/
static void set_mac_address(char *string)
{
unsigned int i;
struct eeprom_hats_atom_header *atom4;
atom4 = (struct eeprom_hats_atom_header *)
hats_get_atom((struct eeprom_hats_header *)eeprom_wp_buff,
HATS_ATOM_CUSTOM);
if (strncasecmp(STARFIVE_OUI_PREFIX, string,
strlen(STARFIVE_OUI_PREFIX))) {
printf("The MAC address doesn't match StarFive OUI %s\n",
STARFIVE_OUI_PREFIX);
return;
}
for (i = 0; *string && (i < MAC_ADDR_BYTES); i++) {
einfo.mac_addr[i] = hextoul(string, &string);
if (*string == ':')
string++;
}
update_crc(atom4);
}
/**
* set_pcb_revision() - stores a StarFive PCB revision into the local EEPROM copy
*
* Takes a pointer to a string representing the numeric PCB revision in
* decimal ("0" - "255"), stores it in the pcb_revision field of the
* EEPROM local copy, and updates the CRC of the local copy.
*/
static void set_pcb_revision(char *string)
{
u8 p;
uint base = 16;
struct eeprom_hats_atom_header *atom4;
atom4 = (struct eeprom_hats_atom_header *)
hats_get_atom((struct eeprom_hats_header *)eeprom_wp_buff,
HATS_ATOM_CUSTOM);
p = (u8)simple_strtoul(string, NULL, base);
if (p > U8_MAX) {
printf("%s must not be greater than %d\n", "PCB revision",
U8_MAX);
return;
}
*einfo.pcb_revision = p;
update_crc(atom4);
}
/**
* set_bom_revision() - stores a StarFive BOM revision into the local EEPROM copy
*
* Takes a pointer to a uppercase ASCII character representing the BOM
* revision ("A" - "Z"), stores it in the bom_revision field of the
* EEPROM local copy, and updates the CRC of the local copy.
*/
static void set_bom_revision(char *string)
{
struct eeprom_hats_atom_header *atom4;
atom4 = (struct eeprom_hats_atom_header *)
hats_get_atom((struct eeprom_hats_header *)eeprom_wp_buff,
HATS_ATOM_CUSTOM);
if (string[0] < 'A' || string[0] > 'Z') {
printf("BOM revision must be an uppercase letter between A and Z\n");
return;
}
*einfo.bom_revision = string[0];
update_crc(atom4);
}
/**
* set_product_id() - stores a StarFive product ID into the local EEPROM copy
*
* Takes a pointer to a string representing the numeric product ID in
* string ("VF7100A1-2150-D008E000-00000001\0"), stores it in the product string
* field of the EEPROM local copy, and updates the CRC of the local copy.
*/
static void set_product_id(char *string)
{
struct eeprom_hats_atom_header *atom1;
atom1 = (struct eeprom_hats_atom_header *)
hats_get_atom((struct eeprom_hats_header *)eeprom_wp_buff,
HATS_ATOM_VENDOR);
memcpy((void *)einfo.pstr, (void *)string,
STARFIVE_EEPROM_ATOM1_PSTR_SIZE);
update_crc(atom1);
}
/**
* init_local_copy() - initialize the in-memory EEPROM copy
*
* Initialize the in-memory EEPROM copy with the magic number. Must
* be done when preparing to initialize a blank EEPROM, or overwrite
* one with a corrupted magic number.
*/
static void init_local_copy(uchar *buff)
{
struct eeprom_hats_header *hats = (struct eeprom_hats_header *)buff;
struct eeprom_hats_atom_header *atom1 = (void *)hats +
sizeof(struct eeprom_hats_header);
struct eeprom_hats_atom_header *atom4_v1 = (void *)atom1 +
sizeof(struct starfive_eeprom_atom1);
memcpy((void *)hats, (void *)&starfive_eeprom_hats_header_default,
sizeof(struct eeprom_hats_header));
memcpy((void *)atom1, (void *)&starfive_eeprom_atom1_default,
sizeof(struct starfive_eeprom_atom1));
memcpy((void *)atom4_v1, (void *)&starfive_eeprom_atom4_v1_default,
sizeof(struct starfive_eeprom_atom4_v1));
update_crc(atom1);
update_crc(atom4_v1);
}
static int print_usage(void)
{
printf("display and program the system ID and MAC addresses in EEPROM\n"
"[read_eeprom|initialize|write_eeprom|mac_address|pcb_revision|bom_revision|product_id]\n"
"mac read_eeprom\n"
" - read EEPROM content into memory data structure\n"
"mac write_eeprom\n"
" - save memory data structure to the EEPROM\n"
"mac initialize\n"
" - initialize the in-memory EEPROM copy with default data\n"
"mac mac_address <xx:xx:xx:xx:xx:xx>\n"
" - stores a MAC address into the local EEPROM copy\n"
"mac pcb_revision <?>\n"
" - stores a StarFive PCB revision into the local EEPROM copy\n"
"mac bom_revision <A>\n"
" - stores a StarFive BOM revision into the local EEPROM copy\n"
"mac product_id <VF7100A1-2150-D008E000-xxxxxxxx>\n"
" - stores a StarFive product ID into the local EEPROM copy\n");
return 0;
}
int do_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
char *cmd;
if (argc == 1) {
show_eeprom(&einfo);
return 0;
}
if (argc > 3)
return print_usage();
cmd = argv[1];
/* Commands with no argument */
if (!strcmp(cmd, "read_eeprom")) {
has_been_read = 0;
return read_eeprom(eeprom_wp_buff);
} else if (!strcmp(cmd, "initialize")) {
init_local_copy(eeprom_wp_buff);
return 0;
} else if (!strcmp(cmd, "write_eeprom")) {
return prog_eeprom(eeprom_wp_buff,
STARFIVE_EEPROM_HATS_SIZE_MAX);
}
if (argc != 3)
return print_usage();
if (is_match_magic(eeprom_wp_buff)) {
printf("Please read the EEPROM ('read_eeprom') and/or initialize the EEPROM ('initialize') first.\n");
return 0;
}
if (!strcmp(cmd, "mac_address")) {
set_mac_address(argv[2]);
return 0;
} else if (!strcmp(cmd, "pcb_revision")) {
set_pcb_revision(argv[2]);
return 0;
} else if (!strcmp(cmd, "bom_revision")) {
set_bom_revision(argv[2]);
return 0;
} else if (!strcmp(cmd, "product_id")) {
set_product_id(argv[2]);
return 0;
}
return print_usage();
}
/**
* mac_read_from_eeprom() - read the MAC address & the serial number in EEPROM
*
* This function reads the MAC address and the serial number from EEPROM and
* sets the appropriate environment variables for each one read.
*
* The environment variables are only set if they haven't been set already.
* This ensures that any user-saved variables are never overwritten.
*
* If CONFIG_ID_EEPROM is enabled, this function will be called in
* "static init_fnc_t init_sequence_r[]" of u-boot/common/board_r.c.
*/
int mac_read_from_eeprom(void)
{
/**
* try to fill the buff from EEPROM,
* always return SUCCESS, even some error happens.
*/
if (read_eeprom(eeprom_wp_buff))
return 0;
// 1, setup ethaddr env
eth_env_set_enetaddr("ethaddr", einfo.mac_addr);
/**
* 2, setup serial# env, reference to hifive-platform-i2c-eeprom.c,
* serial# can be a ASCII string, but not just a hex number, so we
* setup serial# in the 32Byte format:
* "VF7100A1-2201-D008E000-00000001;"
* "<product>-<date>-<DDR&eMMC>-<serial_number>"
* <date>: 4Byte, should be the output of `date +%y%W`
* <DDR&eMMC>: 8Byte, "D008" means 8GB, "D01T" means 1TB;
* "E000" means no eMMC，"E032" means 32GB, "E01T" means 1TB.
* <serial_number>: 8Byte, the Unique Identifier of board in hex.
*/
if (!env_get("serial#"))
env_set("serial#", einfo.pstr);
return 0;
}

4
cmd/eeprom.c
View file

@ -218,10 +218,10 @@ int eeprom_write(unsigned dev_addr, unsigned offset,
return ret;
}
static int parse_numeric_param(char *str)
static long parse_numeric_param(char *str)
{
char *endptr;
int value = simple_strtol(str, &endptr, 16);
long value = simple_strtol(str, &endptr, 16);
return (*endptr != '\0') ? -1 : value;
}

6
common/Kconfig
View file

@ -548,6 +548,12 @@ config MISC_INIT_R
help
Enabling this option calls 'misc_init_r' function
config ID_EEPROM
bool "Enable I2C connected system identifier EEPROM"
help
A number of different systems and vendors enable a vendor-specified
EEPROM that contains various identifying features.
config PCI_INIT_R
bool "Enumerate PCI buses during init"
depends on PCI

2
common/board_r.c
View file

@ -720,7 +720,7 @@ static init_fnc_t init_sequence_r[] = {
#endif
INIT_FUNC_WATCHDOG_RESET
cpu_secondary_init_r,
#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
#if defined(CONFIG_ID_EEPROM)
mac_read_from_eeprom,
#endif
INIT_FUNC_WATCHDOG_RESET

1
configs/MPC8548CDS_36BIT_defconfig
View file

@ -12,6 +12,7 @@ CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
# CONFIG_MISC_INIT_R is not set
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y

1
configs/MPC8548CDS_defconfig
View file

@ -11,6 +11,7 @@ CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
# CONFIG_MISC_INIT_R is not set
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y

1
configs/MPC8548CDS_legacy_defconfig
View file

@ -12,6 +12,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
CONFIG_BOOTDELAY=10
# CONFIG_MISC_INIT_R is not set
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y

1
configs/P1010RDB-PB_36BIT_NAND_defconfig
View file

@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y

1
configs/P1010RDB-PB_36BIT_NOR_defconfig
View file

@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y

1
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
View file

@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y

1
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
View file

@ -24,6 +24,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y

1
configs/P1010RDB-PB_NAND_defconfig
View file

@ -21,6 +21,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y

1
configs/P1010RDB-PB_NOR_defconfig
View file

@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y

1
configs/P1010RDB-PB_SDCARD_defconfig
View file

@ -21,6 +21,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y

1
configs/P1010RDB-PB_SPIFLASH_defconfig
View file

@ -23,6 +23,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y

1
configs/P2041RDB_NAND_defconfig
View file

@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P2041RDB_SDCARD_defconfig
View file

@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P2041RDB_SPIFLASH_defconfig
View file

@ -15,6 +15,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P2041RDB_defconfig
View file

@ -13,6 +13,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P3041DS_NAND_defconfig
View file

@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P3041DS_SDCARD_defconfig
View file

@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P3041DS_SPIFLASH_defconfig
View file

@ -15,6 +15,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P3041DS_defconfig
View file

@ -13,6 +13,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P4080DS_SDCARD_defconfig
View file

@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P4080DS_SPIFLASH_defconfig
View file

@ -15,6 +15,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P4080DS_defconfig
View file

@ -13,6 +13,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P5040DS_NAND_defconfig
View file

@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P5040DS_SDCARD_defconfig
View file

@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P5040DS_SPIFLASH_defconfig
View file

@ -15,6 +15,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/P5040DS_defconfig
View file

@ -13,6 +13,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/T1024RDB_NAND_defconfig
View file

@ -25,6 +25,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_FSL_PBL=y

1
configs/T1024RDB_SDCARD_defconfig
View file

@ -24,6 +24,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_FSL_PBL=y

1
configs/T1024RDB_SPIFLASH_defconfig
View file

@ -26,6 +26,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_FSL_PBL=y

1
configs/T1024RDB_defconfig
View file

@ -17,6 +17,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y

1
configs/ls1012aqds_qspi_defconfig
View file

@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMINFO=y

1
configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
View file

@ -24,6 +24,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMINFO=y

1
configs/ls1012aqds_tfa_defconfig
View file

@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMINFO=y

1
configs/ls1021aiot_qspi_defconfig
View file

@ -11,6 +11,7 @@ CONFIG_AHCI=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y

1
configs/ls1021aiot_sdcard_defconfig
View file

@ -13,6 +13,7 @@ CONFIG_AHCI=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8

1
configs/ls1021aqds_ddr4_nor_defconfig
View file

@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y

1
configs/ls1021aqds_ddr4_nor_lpuart_defconfig
View file

@ -19,6 +19,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y

1
configs/ls1021aqds_nand_defconfig
View file

@ -26,6 +26,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8

1
configs/ls1021aqds_nor_SECURE_BOOT_defconfig
View file

@ -19,6 +19,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y

1
configs/ls1021aqds_nor_defconfig
View file

@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y

1
configs/ls1021aqds_nor_lpuart_defconfig
View file

@ -19,6 +19,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y

1
configs/ls1021aqds_qspi_defconfig
View file

@ -21,6 +21,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y

1
configs/ls1021aqds_sdcard_ifc_defconfig
View file

@ -25,6 +25,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8

1
configs/ls1021aqds_sdcard_qspi_defconfig
View file

@ -25,6 +25,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8

1
configs/ls1021atsn_qspi_defconfig
View file

@ -17,6 +17,7 @@ CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DM=y

1
configs/ls1021atsn_sdcard_defconfig
View file

@ -22,6 +22,7 @@ CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y

1
configs/ls1021atwr_nor_SECURE_BOOT_defconfig
View file

@ -21,6 +21,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y

1
configs/ls1021atwr_nor_defconfig
View file

@ -20,6 +20,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y

1
configs/ls1021atwr_nor_lpuart_defconfig
View file

@ -22,6 +22,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y

1
configs/ls1021atwr_qspi_defconfig
View file

@ -24,6 +24,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y

1
configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
View file

@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8

1
configs/ls1021atwr_sdcard_ifc_defconfig
View file

@ -28,6 +28,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8

1
configs/ls1021atwr_sdcard_qspi_defconfig
View file

@ -28,6 +28,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8

1
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
View file

@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y

1
configs/ls1028aqds_tfa_defconfig
View file

@ -23,6 +23,7 @@ CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y

1
configs/ls1028aqds_tfa_lpuart_defconfig
View file

@ -23,6 +23,7 @@ CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y

1
configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
View file

@ -21,6 +21,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y

1
configs/ls1028ardb_tfa_defconfig
View file

@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y

1
configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
View file

@ -23,6 +23,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_DM=y

1
configs/lx2162aqds_tfa_defconfig
View file

@ -25,6 +25,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_DM=y

1
configs/lx2162aqds_tfa_verified_boot_defconfig
View file

@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_DM=y

1
configs/sifive_unmatched_defconfig
View file

@ -19,6 +19,7 @@ CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unmatched-a00.dtb"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_ID_EEPROM=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_YMODEM_SUPPORT=y

163
configs/starfive_jh7100_visionfive_smode_defconfig Normal file
View file

@ -0,0 +1,163 @@
CONFIG_RISCV=y
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x200000000
CONFIG_ENV_SIZE=0x1f000
CONFIG_ENV_SECT_SIZE=0x1000
# CONFIG_DM_GPIO is not set
CONFIG_DEFAULT_DEVICE_TREE="jh7100-visionfive"
CONFIG_IDENT_STRING="StarFive"
CONFIG_SYS_CLK_FREQ=1000000000
CONFIG_TARGET_STARFIVE_JH7100=y
CONFIG_JH_STARLIGHT=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_SHOW_REGS=y
CONFIG_LOCALVERSION="-VisionFive"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_BOOT_GET_CMDLINE=y
CONFIG_SYS_BOOT_GET_KBD=y
CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_CHROMEOS=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_QSPI_BOOT=y
CONFIG_SD_BOOT=y
CONFIG_SPI_BOOT=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_DELAY_STR="f"
CONFIG_AUTOBOOT_STOP_STR="v"
CONFIG_AUTOBOOT_KEYED_CTRLC=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run mmcbootenv"
CONFIG_DEFAULT_FDT_FILE="starfive/jh7100-visionfive.dtb"
CONFIG_CONSOLE_RECORD=y
CONFIG_LOG_MAX_LEVEL=5
CONFIG_LOG_ERROR_RETURN=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_PROMPT="VisionFive #"
CONFIG_CMD_CONFIG=y
CONFIG_CMD_LICENSE=y
CONFIG_CMD_SBI=y
CONFIG_CMD_BOOTZ=y
CONFIG_BOOTM_OPENRTOS=y
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_ENV_CALLBACK=y
CONFIG_CMD_ENV_FLAGS=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_NVEDIT_INFO=y
CONFIG_CMD_NVEDIT_LOAD=y
CONFIG_CMD_NVEDIT_SELECT=y
CONFIG_CMD_BINOP=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_SIZE=512
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_LOOPW=y
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEM_SEARCH=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_SHA1SUM=y
CONFIG_SHA1SUM_VERIFY=y
CONFIG_CMD_STRINGS=y
CONFIG_CMD_CLK=y
# CONFIG_CMD_GPIO is not set
CONFIG_CMD_GPT_RENAME=y
CONFIG_CMD_I2C=y
CONFIG_CMD_LSBLK=y
CONFIG_CMD_MBR=y
CONFIG_CMD_MISC=y
CONFIG_CMD_BKOPS_ENABLE=y
CONFIG_CMD_MMC_SWRITE=y
CONFIG_CMD_CLONE=y
CONFIG_CMD_READ=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SETEXPR_FMT=y
CONFIG_BOOTP_DNS2=y
CONFIG_BOOTP_PREFER_SERVERIP=y
CONFIG_BOOTP_NTPSERVER=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_RARP=y
# CONFIG_CMD_MII is not set
CONFIG_CMD_MDIO=y
CONFIG_CMD_DNS=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_UUID=y
CONFIG_CMD_AES=y
CONFIG_CMD_HASH=y
CONFIG_HASH_VERIFY=y
CONFIG_CMD_CBFS=y
CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SQUASHFS=y
CONFIG_CMD_FS_UUID=y
CONFIG_CMD_DIAG=y
CONFIG_CMD_LOG=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SECT_SIZE_AUTO=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_TSIZE=y
CONFIG_SERVERIP_FROM_PROXYDHCP=y
CONFIG_SIFIVE_CCACHE_WAYENABLE_OPT=y
CONFIG_SIFIVE_CCACHE_WAYENABLE_NUM=16
# CONFIG_CLK is not set
CONFIG_SYS_I2C_DW=y
# CONFIG_SYS_I2C_OCORES is not set
# CONFIG_SIFIVE_OTP is not set
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC_BROKEN_CD is not set
# CONFIG_MMC_SPI is not set
# CONFIG_MMC_QUIRKS is not set
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_DW=y
# CONFIG_MTD is not set
CONFIG_SF_DEFAULT_MODE=0x0
CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_GIGADEVICE=y
# CONFIG_SPI_FLASH_ISSI is not set
CONFIG_MTD_UBI=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_ADDR=3
# CONFIG_PHY_MSCC is not set
CONFIG_PHY_YUTAI=y
# CONFIG_DM_ETH is not set
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
# CONFIG_MII is not set
# CONFIG_DM_PWM is not set
# CONFIG_RAM_SIFIVE is not set
CONFIG_SPECIFY_CONSOLE_INDEX=y
# CONFIG_SIFIVE_SERIAL is not set
CONFIG_CADENCE_QSPI=y
# CONFIG_SPI_SIFIVE is not set
# CONFIG_SYSRESET is not set
CONFIG_FS_CBFS=y
# CONFIG_FAT_WRITE is not set
CONFIG_FS_CRAMFS=y
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
CONFIG_ERRNO_STR=y
# CONFIG_GENERATE_SMBIOS_TABLE is not set
CONFIG_UNIT_TEST=y

3
drivers/misc/Kconfig
View file

@ -77,8 +77,7 @@ config SIFIVE_OTP
config STARFIVE_OTP
bool "StarFive eMemory OTP driver"
depends on MISC && JH_STARLIGHT
default y if JH_STARLIGHT
depends on MISC && JH_STARLIGHT && !ID_EEPROM
help
Enable support for reading and writing the eMemory OTP on the
StarFive SoCs.

3
drivers/net/phy/Kconfig
View file

@ -204,6 +204,9 @@ endif # PHY_MICREL
config PHY_MSCC
bool "Microsemi Corp Ethernet PHYs support"
config PHY_YUTAI
bool "YuTai Corp Ethernet PHYs support"
config PHY_NATSEMI
bool "National Semiconductor Ethernet PHYs support"

1
drivers/net/phy/Makefile
View file

@ -35,3 +35,4 @@ obj-$(CONFIG_PHY_VITESSE) += vitesse.o
obj-$(CONFIG_PHY_MSCC) += mscc.o
obj-$(CONFIG_PHY_FIXED) += fixed.o
obj-$(CONFIG_PHY_NCSI) += ncsi.o
obj-$(CONFIG_PHY_YUTAI) += motorcomm.o

282
drivers/net/phy/motorcomm.c Normal file
View file

@ -0,0 +1,282 @@
/*
* RealTek PHY drivers
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* Copyright 2010-2011 Freescale Semiconductor, Inc.
* author Andy Fleming
*
*/
#include <config.h>
#include <common.h>
#include <phy.h>
#define REG_PHY_SPEC_STATUS 0x11
#define REG_DEBUG_ADDR_OFFSET 0x1e
#define REG_DEBUG_DATA 0x1f
#define EXTREG_SLEEP_CONTROL 0x27
#define YT8512_DUPLEX 0x2000
#define YT8521_SPEED_MODE 0xc000
#define YT8521_DUPLEX 0x2000
#define YT8521_SPEED_MODE_BIT 14
#define YT8521_DUPLEX_BIT 13
#define YT8521_LINK_STATUS_BIT 10
#define SPEED_UNKNOWN -1
static int ytphy_read_ext(struct phy_device *phydev, u32 regnum)
{
int ret;
ret = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, regnum);
if (ret < 0)
return ret;
return phy_read(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA);
}
static int ytphy_write_ext(struct phy_device *phydev, u32 regnum, u16 val)
{
int ret;
ret = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, regnum);
if (ret < 0)
return ret;
return phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA, val);
}
static int yt8511_config(struct phy_device *phydev)
{
u16 val = 0;
int err = 0;
genphy_config_aneg(phydev);
/* disable sleep mode */
err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, EXTREG_SLEEP_CONTROL);
if (err < 0) {
printf("yt8511_config: write EXTREG_SLEEP_CONTROL error!\n");
return err;
}
val = phy_read(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA);
val &= ~(1<<15);
err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA, val);
if (err < 0) {
printf("yt8511_config: write REG_DEBUG_DATA error!\n");
return err;
}
/* config PLL clock */
err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, 0xc);
if (err < 0) {
printf("yt8511_config: write 0xc error!\n");
return err;
}
val = phy_read(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA);
/* ext reg 0xc.b[2:1]
00-----25M from pll;
01---- 25M from xtl;(default)
10-----62.5M from pll;
11----125M from pll(here set to this value)
*/
val &= ~(3<<1); //00-----25M from pll;
val |= (1<<1); //01-----25M from xtl; (default)
err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA, val);
if (err < 0) {
printf("yt8511_config: set PLL error!\n");
return err;
}
return 0;
}
static int yt8521_config(struct phy_device *phydev)
{
int ret, val;
ytphy_write_ext(phydev, 0xa000, 0);
genphy_config_aneg(phydev);
/* disable auto sleep */
val = ytphy_read_ext(phydev, EXTREG_SLEEP_CONTROL);
if (val < 0) {
printf("yt8521_config: read EXTREG_SLEEP_CONTROL error!\n");
return val;
}
val &= ~(1<<15);
ret = ytphy_write_ext(phydev, EXTREG_SLEEP_CONTROL, val);
if (ret < 0) {
printf("yt8521_config: write EXTREG_SLEEP_CONTROL error!\n");
return ret;
}
/* enable tx delay 450ps per step */
val = ytphy_read_ext(phydev, 0xa003);
if (val < 0) {
printf("yt8521_config: read 0xa003 error!\n");
return val;
}
val |= 0x3;
ret = ytphy_write_ext(phydev, 0xa003, val);
if (ret < 0) {
printf("yt8521_config: set 0xa003 error!\n");
return ret;
}
/* disable rx delay */
val = ytphy_read_ext(phydev, 0xa001);
if (val < 0) {
printf("yt8521_config: read 0xa001 error!\n");
return val;
}
val &= ~(1<<8);
ret = ytphy_write_ext(phydev, 0xa001, val);
if (ret < 0) {
printf("yt8521_config: failed to disable rx_delay!\n");
return ret;
}
/* enable RXC clock when no wire plug */
ret = ytphy_write_ext(phydev, 0xa000, 0);
if (ret < 0) {
printf("yt8521_config: failed to enable RXC clock!\n");
return ret;
}
val = ytphy_read_ext(phydev, 0xc);
if (val < 0) {
printf("yt8521_config: read 0xc error!\n");
return val;
}
val &= ~(1 << 12);
ret = ytphy_write_ext(phydev, 0xc, val);
if (ret < 0) {
printf("yt8521_config: set 0xc error!\n");
return ret;
}
return 0;
}
static int yt8521_adjust_status(struct phy_device *phydev, int val, int is_utp)
{
int speed_mode, duplex;
int speed = SPEED_UNKNOWN;
duplex = (val & YT8512_DUPLEX) >> YT8521_DUPLEX_BIT;
speed_mode = (val & YT8521_SPEED_MODE) >> YT8521_SPEED_MODE_BIT;
switch (speed_mode) {
case 0:
if (is_utp)
speed = SPEED_10;
break;
case 1:
speed = SPEED_100;
break;
case 2:
speed = SPEED_1000;
break;
case 3:
break;
default:
speed = SPEED_UNKNOWN;
break;
}
phydev->speed = speed;
phydev->duplex = duplex;
return 0;
}
static int yt8521_parse_status(struct phy_device *phydev)
{
int ret, val, link, link_utp;
/* reading UTP */
ret = ytphy_write_ext(phydev, 0xa000, 0);
if (ret < 0)
return ret;
val = phy_read(phydev, MDIO_DEVAD_NONE, REG_PHY_SPEC_STATUS);
if (val < 0)
return val;
link = val & (BIT(YT8521_LINK_STATUS_BIT));
if (link) {
link_utp = 1;
yt8521_adjust_status(phydev, val, 1);
} else {
link_utp = 0;
}
if (link_utp) {
phydev->link = 1;
ytphy_write_ext(phydev, 0xa000, 0);
} else {
phydev->link = 0;
}
return 0;
}
static int yt8521_startup(struct phy_device *phydev)
{
int retval;
retval = genphy_update_link(phydev);
if (retval)
return retval;
return yt8521_parse_status(phydev);
}
static struct phy_driver YT8511_driver = {
.name = "YuTai YT8511",
.uid = 0x0000010a,
.mask = 0x00000fff,
.features = PHY_GBIT_FEATURES,
.config = &yt8511_config,
.startup = &genphy_startup,
.shutdown = &genphy_shutdown,
};
static struct phy_driver YT8521_driver = {
.name = "YuTai YT8521",
.uid = 0x0000011a,
.mask = 0x00000fff,
.features = PHY_GBIT_FEATURES,
.config = &yt8521_config,
.startup = &yt8521_startup,
.shutdown = &genphy_shutdown,
};
int phy_yutai_init(void)
{
phy_register(&YT8511_driver);
phy_register(&YT8521_driver);
return 0;
}

3
drivers/net/phy/phy.c
View file

@ -561,6 +561,9 @@ int phy_init(void)
#endif
#ifdef CONFIG_PHY_XILINX_GMII2RGMII
phy_xilinx_gmii2rgmii_init();
#endif
#ifdef CONFIG_PHY_YUTAI
phy_yutai_init();
#endif
genphy_init();

1
include/configs/MPC8548CDS.h
View file

@ -308,7 +308,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_I2C_FSL
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_CCID
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2

1
include/configs/P1010RDB.h
View file

@ -516,7 +516,6 @@ extern unsigned long get_sdram_size(void);
/* I2C EEPROM */
#if defined(CONFIG_TARGET_P1010RDB_PB)
#define CONFIG_ID_EEPROM
#ifdef CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#endif

1
include/configs/P2041RDB.h
View file

@ -88,7 +88,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#endif
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50

1
include/configs/T102xRDB.h
View file

@ -170,7 +170,6 @@ unsigned long get_board_ddr_clk(void);
#endif
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50

1
include/configs/T208xQDS.h
View file

@ -130,7 +130,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/T208xRDB.h
View file

@ -119,7 +119,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50

1
include/configs/corenet_ds.h
View file

@ -101,7 +101,6 @@
#endif
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/ls1012aqds.h
View file

@ -54,7 +54,6 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/ls1021aiot.h
View file

@ -110,7 +110,6 @@
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51

1
include/configs/ls1021aqds.h
View file

@ -349,7 +349,6 @@ unsigned long get_board_ddr_clk(void);
#endif
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/ls1021atsn.h
View file

@ -116,7 +116,6 @@
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51

1
include/configs/ls1021atwr.h
View file

@ -227,7 +227,6 @@
#endif
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 1
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53

1
include/configs/ls1028a_common.h
View file

@ -103,7 +103,6 @@
#define I2C_MUX_CH_DEFAULT 0x8
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/ls1043aqds.h
View file

@ -79,7 +79,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SCSI_AHCI_PLAT
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/ls1043ardb.h
View file

@ -228,7 +228,6 @@
/* EEPROM */
#ifndef SPL_NO_EEPROM
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53

1
include/configs/ls1046afrwy.h
View file

@ -74,7 +74,6 @@
#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52

1
include/configs/ls1046aqds.h
View file

@ -103,7 +103,6 @@ unsigned long get_board_ddr_clk(void);
#endif
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/ls1046ardb.h
View file

@ -135,7 +135,6 @@
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53

1
include/configs/ls1088aqds.h
View file

@ -335,7 +335,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/ls1088ardb.h
View file

@ -241,7 +241,6 @@
#endif
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/ls2080aqds.h
View file

@ -304,7 +304,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_RTC_ENABLE_32KHZ_OUTPUT
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/ls2080ardb.h
View file

@ -286,7 +286,6 @@ unsigned long get_board_sys_clk(void);
#endif
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

1
include/configs/lx2160a_common.h
View file

@ -110,7 +110,6 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57

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