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Merge branch 'master' of git://git.denx.de/u-boot-arm

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This commit is contained in:
Wolfgang Denk 2008-11-25 12:04:41 +01:00
commit 49a4c7476f
2 changed files with 65 additions and 68 deletions
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131
drivers/i2c/omap24xx_i2c.c
View file

@ -25,9 +25,6 @@
#include <asm/arch/i2c.h> #include <asm/arch/i2c.h>
#include <asm/io.h> #include <asm/io.h>
#define inw(a) __raw_readw(a)
#define outw(a,v) __raw_writew(a,v)
static void wait_for_bb (void); static void wait_for_bb (void);
static u16 wait_for_pin (void); static u16 wait_for_pin (void);
static void flush_fifo(void); static void flush_fifo(void);
@ -36,32 +33,32 @@ void i2c_init (int speed, int slaveadd)
{ {
u16 scl; u16 scl;
outw(0x2, I2C_SYSC); /* for ES2 after soft reset */ writew(0x2, I2C_SYSC); /* for ES2 after soft reset */
udelay(1000); udelay(1000);
outw(0x0, I2C_SYSC); /* will probably self clear but */ writew(0x0, I2C_SYSC); /* will probably self clear but */
if (inw (I2C_CON) & I2C_CON_EN) { if (readw (I2C_CON) & I2C_CON_EN) {
outw (0, I2C_CON); writew (0, I2C_CON);
udelay (50000); udelay (50000);
} }
/* 12MHz I2C module clock */ /* 12MHz I2C module clock */
outw (0, I2C_PSC); writew (0, I2C_PSC);
speed = speed/1000; /* 100 or 400 */ speed = speed/1000; /* 100 or 400 */
scl = ((12000/(speed*2)) - 7); /* use 7 when PSC = 0 */ scl = ((12000/(speed*2)) - 7); /* use 7 when PSC = 0 */
outw (scl, I2C_SCLL); writew (scl, I2C_SCLL);
outw (scl, I2C_SCLH); writew (scl, I2C_SCLH);
/* own address */ /* own address */
outw (slaveadd, I2C_OA); writew (slaveadd, I2C_OA);
outw (I2C_CON_EN, I2C_CON); writew (I2C_CON_EN, I2C_CON);
/* have to enable intrrupts or OMAP i2c module doesn't work */ /* have to enable intrrupts or OMAP i2c module doesn't work */
outw (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | writew (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE); I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE);
udelay (1000); udelay (1000);
flush_fifo(); flush_fifo();
outw (0xFFFF, I2C_STAT); writew (0xFFFF, I2C_STAT);
outw (0, I2C_CNT); writew (0, I2C_CNT);
} }
static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
@ -73,19 +70,19 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
wait_for_bb (); wait_for_bb ();
/* one byte only */ /* one byte only */
outw (1, I2C_CNT); writew (1, I2C_CNT);
/* set slave address */ /* set slave address */
outw (devaddr, I2C_SA); writew (devaddr, I2C_SA);
/* no stop bit needed here */ /* no stop bit needed here */
outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON); writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON);
status = wait_for_pin (); status = wait_for_pin ();
if (status & I2C_STAT_XRDY) { if (status & I2C_STAT_XRDY) {
/* Important: have to use byte access */ /* Important: have to use byte access */
*(volatile u8 *) (I2C_DATA) = regoffset; writeb (regoffset, I2C_DATA);
udelay (20000); udelay (20000);
if (inw (I2C_STAT) & I2C_STAT_NACK) { if (readw (I2C_STAT) & I2C_STAT_NACK) {
i2c_error = 1; i2c_error = 1;
} }
} else { } else {
@ -94,42 +91,42 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
if (!i2c_error) { if (!i2c_error) {
/* free bus, otherwise we can't use a combined transction */ /* free bus, otherwise we can't use a combined transction */
outw (0, I2C_CON); writew (0, I2C_CON);
while (inw (I2C_STAT) || (inw (I2C_CON) & I2C_CON_MST)) { while (readw (I2C_STAT) || (readw (I2C_CON) & I2C_CON_MST)) {
udelay (10000); udelay (10000);
/* Have to clear pending interrupt to clear I2C_STAT */ /* Have to clear pending interrupt to clear I2C_STAT */
outw (0xFFFF, I2C_STAT); writew (0xFFFF, I2C_STAT);
} }
wait_for_bb (); wait_for_bb ();
/* set slave address */ /* set slave address */
outw (devaddr, I2C_SA); writew (devaddr, I2C_SA);
/* read one byte from slave */ /* read one byte from slave */
outw (1, I2C_CNT); writew (1, I2C_CNT);
/* need stop bit here */ /* need stop bit here */
outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP,
I2C_CON); I2C_CON);
status = wait_for_pin (); status = wait_for_pin ();
if (status & I2C_STAT_RRDY) { if (status & I2C_STAT_RRDY) {
*value = inw (I2C_DATA); *value = readw (I2C_DATA);
udelay (20000); udelay (20000);
} else { } else {
i2c_error = 1; i2c_error = 1;
} }
if (!i2c_error) { if (!i2c_error) {
outw (I2C_CON_EN, I2C_CON); writew (I2C_CON_EN, I2C_CON);
while (inw (I2C_STAT) while (readw (I2C_STAT)
|| (inw (I2C_CON) & I2C_CON_MST)) { || (readw (I2C_CON) & I2C_CON_MST)) {
udelay (10000); udelay (10000);
outw (0xFFFF, I2C_STAT); writew (0xFFFF, I2C_STAT);
} }
} }
} }
flush_fifo(); flush_fifo();
outw (0xFFFF, I2C_STAT); writew (0xFFFF, I2C_STAT);
outw (0, I2C_CNT); writew (0, I2C_CNT);
return i2c_error; return i2c_error;
} }
@ -142,22 +139,22 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value)
wait_for_bb (); wait_for_bb ();
/* two bytes */ /* two bytes */
outw (2, I2C_CNT); writew (2, I2C_CNT);
/* set slave address */ /* set slave address */
outw (devaddr, I2C_SA); writew (devaddr, I2C_SA);
/* stop bit needed here */ /* stop bit needed here */
outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
I2C_CON_STP, I2C_CON); I2C_CON_STP, I2C_CON);
/* wait until state change */ /* wait until state change */
status = wait_for_pin (); status = wait_for_pin ();
if (status & I2C_STAT_XRDY) { if (status & I2C_STAT_XRDY) {
/* send out two bytes */ /* send out two bytes */
outw ((value << 8) + regoffset, I2C_DATA); writew ((value << 8) + regoffset, I2C_DATA);
/* must have enough delay to allow BB bit to go low */ /* must have enough delay to allow BB bit to go low */
udelay (50000); udelay (50000);
if (inw (I2C_STAT) & I2C_STAT_NACK) { if (readw (I2C_STAT) & I2C_STAT_NACK) {
i2c_error = 1; i2c_error = 1;
} }
} else { } else {
@ -167,18 +164,18 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value)
if (!i2c_error) { if (!i2c_error) {
int eout = 200; int eout = 200;
outw (I2C_CON_EN, I2C_CON); writew (I2C_CON_EN, I2C_CON);
while ((stat = inw (I2C_STAT)) || (inw (I2C_CON) & I2C_CON_MST)) { while ((stat = readw (I2C_STAT)) || (readw (I2C_CON) & I2C_CON_MST)) {
udelay (1000); udelay (1000);
/* have to read to clear intrrupt */ /* have to read to clear intrrupt */
outw (0xFFFF, I2C_STAT); writew (0xFFFF, I2C_STAT);
if(--eout == 0) /* better leave with error than hang */ if(--eout == 0) /* better leave with error than hang */
break; break;
} }
} }
flush_fifo(); flush_fifo();
outw (0xFFFF, I2C_STAT); writew (0xFFFF, I2C_STAT);
outw (0, I2C_CNT); writew (0, I2C_CNT);
return i2c_error; return i2c_error;
} }
@ -189,10 +186,10 @@ static void flush_fifo(void)
* you get a bus error * you get a bus error
*/ */
while(1){ while(1){
stat = inw(I2C_STAT); stat = readw(I2C_STAT);
if(stat == I2C_STAT_RRDY){ if(stat == I2C_STAT_RRDY){
inw(I2C_DATA); readw(I2C_DATA);
outw(I2C_STAT_RRDY,I2C_STAT); writew(I2C_STAT_RRDY,I2C_STAT);
udelay(1000); udelay(1000);
}else }else
break; break;
@ -203,7 +200,7 @@ int i2c_probe (uchar chip)
{ {
int res = 1; /* default = fail */ int res = 1; /* default = fail */
if (chip == inw (I2C_OA)) { if (chip == readw (I2C_OA)) {
return res; return res;
} }
@ -211,27 +208,27 @@ int i2c_probe (uchar chip)
wait_for_bb (); wait_for_bb ();
/* try to read one byte */ /* try to read one byte */
outw (1, I2C_CNT); writew (1, I2C_CNT);
/* set slave address */ /* set slave address */
outw (chip, I2C_SA); writew (chip, I2C_SA);
/* stop bit needed here */ /* stop bit needed here */
outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON); writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON);
/* enough delay for the NACK bit set */ /* enough delay for the NACK bit set */
udelay (50000); udelay (50000);
if (!(inw (I2C_STAT) & I2C_STAT_NACK)) { if (!(readw (I2C_STAT) & I2C_STAT_NACK)) {
res = 0; /* success case */ res = 0; /* success case */
flush_fifo(); flush_fifo();
outw(0xFFFF, I2C_STAT); writew(0xFFFF, I2C_STAT);
} else { } else {
outw(0xFFFF, I2C_STAT); /* failue, clear sources*/ writew(0xFFFF, I2C_STAT); /* failue, clear sources*/
outw (inw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */ writew (readw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */
udelay(20000); udelay(20000);
wait_for_bb (); wait_for_bb ();
} }
flush_fifo(); flush_fifo();
outw (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/ writew (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/
outw(0xFFFF, I2C_STAT); writew(0xFFFF, I2C_STAT);
return res; return res;
} }
@ -290,17 +287,17 @@ static void wait_for_bb (void)
int timeout = 10; int timeout = 10;
u16 stat; u16 stat;
outw(0xFFFF, I2C_STAT); /* clear current interruts...*/ writew(0xFFFF, I2C_STAT); /* clear current interruts...*/
while ((stat = inw (I2C_STAT) & I2C_STAT_BB) && timeout--) { while ((stat = readw (I2C_STAT) & I2C_STAT_BB) && timeout--) {
outw (stat, I2C_STAT); writew (stat, I2C_STAT);
udelay (50000); udelay (50000);
} }
if (timeout <= 0) { if (timeout <= 0) {
printf ("timed out in wait_for_bb: I2C_STAT=%x\n", printf ("timed out in wait_for_bb: I2C_STAT=%x\n",
inw (I2C_STAT)); readw (I2C_STAT));
} }
outw(0xFFFF, I2C_STAT); /* clear delayed stuff*/ writew(0xFFFF, I2C_STAT); /* clear delayed stuff*/
} }
static u16 wait_for_pin (void) static u16 wait_for_pin (void)
@ -310,7 +307,7 @@ static u16 wait_for_pin (void)
do { do {
udelay (1000); udelay (1000);
status = inw (I2C_STAT); status = readw (I2C_STAT);
} while ( !(status & } while ( !(status &
(I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY | (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK | I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
@ -318,8 +315,8 @@ static u16 wait_for_pin (void)
if (timeout <= 0) { if (timeout <= 0) {
printf ("timed out in wait_for_pin: I2C_STAT=%x\n", printf ("timed out in wait_for_pin: I2C_STAT=%x\n",
inw (I2C_STAT)); readw (I2C_STAT));
outw(0xFFFF, I2C_STAT); writew(0xFFFF, I2C_STAT);
} }
return status; return status;
} }

2
lib_arm/bootm.c
View file

@ -67,7 +67,7 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
char *commandline = getenv ("bootargs"); char *commandline = getenv ("bootargs");
#endif #endif
if ((flag != 0) || (flag != BOOTM_STATE_OS_GO)) if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
return 1; return 1;
theKernel = (void (*)(int, int, uint))images->ep; theKernel = (void (*)(int, int, uint))images->ep;