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Author SHA1 Message Date
keith.zhao
5ab3cf8e46 display: resize the bmp logo 
reduce the bmp size as the uboot partttion is 4M

Signed-off-by: keith <keith.zhao@starfivetech.com>
 2023-03-20 15:44:02 +08:00
andy.hu
6be2d0ba53 Merge branch 'CR_4094_evb_515_uboot_logo_keith.zhao' into 'jh7110-master' 
CR_4094 display: update uboot logo display function:

See merge request sdk/u-boot!42
 2023-03-17 10:29:01 +00:00
keith.zhao
fc2ce6b33e CR_4094 display: update uboot logo display function: 2023-03-17 10:29:01 +00:00
andy.hu
0f9bab35b0 Merge branch 'CR_3499_vout_console_515_changhuang.liang' into 'jh7110-master' 
CR_3499_vout_console_515_changhuang.liang configs: starfive_visionfive_defconfig: Enable console to tty1

See merge request sdk/u-boot!44
 2023-03-17 10:28:01 +00:00
Changhuang Liang
cff9fb30c7 configs: starfive_visionfive_defconfig: Enable console to tty1 
Enable console to tty1.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
 2023-03-17 18:16:23 +08:00
andy.hu
4dd49f9bdc Merge branch 'CR_4082_apply_csr_patch_Andy.Hu' into 'jh7110-master' 
CR_4082: riscv: Fix build against binutils 2.38

See merge request sdk/u-boot!43
 2023-03-17 10:08:54 +00:00
andy.hu
6d65098308 Merge branch 'CR_3910_Add_cpu_vol_mason.huo' into 'jh7110-master' 
CR_3910 board: starfive: jh7110: Add 1.1 & 1.02v max cpu voltage

See merge request sdk/u-boot!40
 2023-03-17 10:08:30 +00:00
Heinrich Schuchardt
0908b45ec9 riscv: support building double-float modules 
The riscv32 toolchain for GCC-12 provided by kernel.org contains libgcc.a
compiled for double-float. To link to it we have to adjust how we build
U-Boot.

As U-Boot actually does not use floating point at all this should not
make a significant difference for the produced binaries.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
 2023-03-17 14:13:29 +08:00
Alexandre Ghiti
7e35037d2b riscv: Fix build against binutils 2.38 
The following description is copied from the equivalent patch for the
Linux Kernel proposed by Aurelien Jarno:

>From version 2.38, binutils default to ISA spec version 20191213. This
means that the csr read/write (csrr*/csrw*) instructions and fence.i
instruction has separated from the `I` extension, become two standalone
extensions: Zicsr and Zifencei. As the kernel uses those instruction,
this causes the following build failure:

arch/riscv/cpu/mtrap.S: Assembler messages:
arch/riscv/cpu/mtrap.S:65: Error: unrecognized opcode `csrr a0,scause'
arch/riscv/cpu/mtrap.S:66: Error: unrecognized opcode `csrr a1,sepc'
arch/riscv/cpu/mtrap.S:67: Error: unrecognized opcode `csrr a2,stval'
arch/riscv/cpu/mtrap.S:70: Error: unrecognized opcode `csrw sepc,a0'

Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Christian Stewart <christian@paral.in>
Reviewed-by: Rick Chen <rick@andestech.com>
 2023-03-17 14:13:29 +08:00
andy.hu
d4dedcadbc Merge branch 'CR_3347_evb_515_uboot_hdmi_logo_keith.zhao' into 'jh7110-master' 
CR_3347: riscv: dts: enable hdmi dts config in uboot

See merge request sdk/u-boot!39
 2023-03-09 09:19:55 +00:00
Mason Huo
2f68eec8b4 board: starfive: jh7110: Add 1.1 & 1.02v max cpu voltage 
Add two more binning IC types, and set add their
max cpu voltage accordingly.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
 2023-03-09 16:21:32 +08:00
keith.zhao
34c5d49814 hdmi: add hdmi driver in uboot 
hdmi can show a bitmap logo while uboot start
and the default resolution is 1920x1080@60fps

Signed-off-by: keith.zhao<keith.zhao@statfivetech.com>
 2023-03-07 18:36:42 -08:00
keith.zhao
e5cef96f23 riscv: dts: enable hdmi dts config in uboot 
hdmi can show a bitmap logo while uboot start
and the default resolution is 1920x1080@60fps

Signed-off-by: keith.zhao<keith.zhao@statfivetech.com>
 2023-03-07 18:31:58 -08:00
andy.hu
f7261333cb Merge branch 'CR_3696_adjust_cpu_vol_mason.huo' into 'jh7110-master' 
CR_3696: Add cpu voltage set commands

See merge request sdk/u-boot!37
 2023-02-28 11:38:25 +00:00
mason.huo
be22331391 board: starfive: jh7110: Add cpu voltage set commands 
Get the binning information from OTP,
and set change the cpu max voltage accordingly.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
 2023-02-28 17:39:45 +08:00
andy.hu
180d4c4a92 Merge branch 'CR_3504_enable_sbi_command_michael.zhu' into 'jh7110-master' 
CR_3504: Enable sbi command in U-Boot

See merge request sdk/u-boot!36
 2023-02-24 09:43:20 +00:00
andy.hu
66806f19a6 Merge branch 'CR_3455_PCIe_support_mason.huo' into 'jh7110-master' 
CR_3455 pci: Add Starfive JH7110 pcie driver

See merge request sdk/u-boot!33
 2023-02-24 09:43:02 +00:00
Mason Huo
620227e7cd i2c: designware_i2c: Add ACPI configure limitation 
As the i2c_designware_pci.c uses ACPI APIs,
add the ACPI table generation configuration
for its compilation.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
 2023-02-22 17:54:41 +08:00
Mason Huo
73afdb8501 net: rtl8169: Add one more device ID 
Add the NIC device ID and adjust the bar regions.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
 2023-02-22 17:54:41 +08:00
Mason Huo
e1c27bd246 riscv: dts: starfive: Enable PCIe host controller 
Enable and add pinctrl configuration for PCIe host controller.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
 2023-02-22 17:54:41 +08:00
Mason Huo
08ad189fb7 configs: starfive-jh7110: Add support for PCIe host driver 
Add the PCIe host driver config,
also add the rtl8169 & nvme driver support.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
 2023-02-22 17:54:41 +08:00
Mason Huo
84cf736072 clk: starfive: Add PCIe clocks for PCIe controller 
Add the stg clocks for PCIe controller.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
 2023-02-22 17:54:41 +08:00
Mason Huo
a17c17c4d2 pci: Add Starfive JH7110 pcie driver 
Port the JH7110 pcie host driver from linux kernel.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
 2023-02-22 17:53:27 +08:00
MichaelZhuxx
cc31fa9511 Enable sbi command in U-Boot 
Signed-off-by: MichaelZhuxx <michael.zhu@starfivetech.com>
 2023-02-21 18:01:38 +08:00
andy.hu
f05aec2af1 Merge branch 'CR_3537_evb_515_uboot_compatibility_EVB_VF2_keith.zhao' into 'jh7110-master' 
CR#3537 riscv:uboot:cache driver

See merge request sdk/u-boot!35
 2023-02-21 06:19:56 +00:00
keith.zhao
5ce454f6e0 riscv:uboot:cache driver 
cache driver enabled by config STARFIVE_JH7110_L2CC_FLUSH
if not , there is a dump on vf2

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
 2023-02-20 22:08:39 -08:00
andy.hu
335f649872 Merge branch 'CR_3345_evb_515_uboot_mipi_logo_keith.zhao' into 'jh7110-master' 
display : uboot logo display

See merge request sdk/u-boot!34
 2023-02-17 10:27:25 +00:00
keith.zhao
d59397603e display : uboot logo display 
replace the logo bmp for uboot logo display

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
 2023-02-17 02:16:27 -08:00
andy.hu
44666e8908 Merge branch 'CR_3345_evb_515_uboot_mipi_logo_keith.zhao' into 'jh7110-master' 
CR_3345: riscv:uboot:add cache driver

See merge request sdk/u-boot!32
 2023-02-17 09:02:48 +00:00
keith.zhao
8fa222fc47 defconfig:riscv:jh7110: add mipi config 
add the new configs needed by mipi display

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
 2023-02-16 22:14:52 -08:00
keith.zhao
cadceda9b6 dts:riscv:jh7110: add mipi driver node 
update dts node to support vout mipi driver

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
 2023-02-16 22:14:52 -08:00
keith.zhao
e8f2e8b73c board:riscv:jh7110: modify config for starfive JH7110 board 
add board_late_init to init display memory
config the bitmap picture

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
 2023-02-16 22:14:52 -08:00
keith.zhao
b67f069c7f vout:dc8200: add vout mipi driver 
add vout mipi pipeline driver in uboot

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
 2023-02-16 22:13:17 -08:00
keith.zhao
83dd874556 i2c:desigware-snps: add i2c clock config 
add clock config for i2c2 and i2c5
update the i2c driver clock config

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
 2023-02-16 19:59:52 -08:00
keith.zhao
f042c1ea25 power: add power subsystem driver in uboot 
add power subsystem in driver,include pmu pmic and regulator
pmu : dc8200 power
pmic : mipi power
regulator : entend power

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
 2023-02-16 19:56:53 -08:00
keith.zhao
a6d99b2bd0 riscv:cache:jh7110: add cache driver 
support flush_dcache_range interface STARFIVE_JH7110_L2CC_FLUSH

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
 2023-02-16 19:56:31 -08:00
andy.hu
5d74715db8 Merge branch 'CR_3238_Reserved_memory_mason.huo' into 'jh7110-master' 
CR_3238 exclude opensbi memory range in device tree

See merge request sdk/u-boot!27
 2023-02-03 11:27:56 +00:00
andy.hu
ec041f7060 Merge branch 'CR_1432_add_sbi_reset_patch_minda' into 'jh7110-master' 
CR_1432 riscv: add missing SBI extension definitions

See merge request sdk/u-boot!26
 2023-02-03 11:26:19 +00:00
Felix Moessbauer
a5b1810f12 exclude opensbi memory range in device tree 
This patch explicitly excludes the memory range of the OpenSBI in the
built-in device tree. When booting EFI, the efi loader has to know
about that zone before loading the device tree for Linux, otherwise
it tries to access 0x40000000, leading to an access violation.

Signed-off-by: Felix Moessbauer <felix.moessbauer@siemens.com>
 2023-02-03 15:25:28 +08:00
Heinrich Schuchardt
b680cc70dc sysreset: provide SBI based sysreset driver 
Provide sysreset driver using the SBI system reset extension.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Samuel Holland <samuel@sholland.org>
 2023-02-02 19:11:45 +08:00
Heinrich Schuchardt
c9051a2bda riscv: add missing SBI extension definitions 
Add the System Reset Extension and the Hart State Management Extension
definitions.

Add missing RFENCE Extension enum values.

The SBI 0.1 extension constants are needed for the sbi command. Remove
an #ifdef.

Cf. https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
 2023-02-02 19:11:40 +08:00
andy.hu
8571717e56 Merge branch 'CR_3068_DEFCONFIG_yanhong.wang' into 'jh7110-master' 
CR 3068 configs: starfive-jh7110: update the value of CONFIG_SYS_MALLOC_F_LEN

See merge request sdk/u-boot!25
 2023-01-11 11:11:51 +00:00
andy.hu
2e9bf27992 Merge branch 'CR_3067_add_boot_hard_id_minda' into 'jh7110-master' 
CR_3067 dts: add boot-hart-id property in dts

See merge request sdk/u-boot!24
 2023-01-11 11:11:12 +00:00
Yanhong Wang
c84fa4dc98 configs: starfive-jh7110: update the value of CONFIG_SYS_MALLOC_F_LEN 
Update the value of CONFIG_SYS_MALLOC_F_LEN from 0x8000 to 0x10000.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
 2023-01-11 17:41:51 +08:00
minda.chen
ac7891c717 dts: add boot-hart-id property in dts 
boot-hart-id is used by opensbi.

Signed-off-by: minda.chen <minda.chen@starfivetech.com>
 2023-01-09 15:19:09 +08:00
andy.hu
bfbdce9b86 Merge branch 'CR_3049_Hibernation_mason.huo' into 'jh7110-master' 
CR_3049 dts: add i2c5 and attach pmic configuration

See merge request sdk/u-boot!22
 2023-01-06 06:41:29 +00:00
andy.hu
ea54199468 Merge branch 'CR_3006_OTP_yanhong.wang' into 'jh7110-master' 
CR_3006  misc: OTP: Starfive-jh7110: update the return value of starfive_otp_read

See merge request sdk/u-boot!21
 2023-01-06 06:25:28 +00:00
andy.hu
84e25a12dc Merge branch 'CR_2708_VOUTCLK_yanhong.wang' into 'jh7110-master' 
CR 2708 clk:starfive: Add vout clock driver for StarFive JH7110

See merge request sdk/u-boot!23
 2023-01-06 06:24:28 +00:00
andy.hu
f267373f7d Merge branch 'CR_2828_perf_support_minda' into 'jh7110-master' 
CR_2828 dts: pmu : add riscv pmu dts config

See merge request sdk/u-boot!20
 2023-01-06 06:14:49 +00:00
Yanhong Wang
1b96445bfc clk:starfive: Add vout clock driver for StarFive JH7110 
Add vout clock driver for StarFive JH7110

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
 2023-01-05 18:04:26 +08:00