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This SoC has one gpio bank divided into two 32 bit registers, with a total of 40 GPIOs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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.. | ||
cpu | ||
dts | ||
include/asm | ||
lib | ||
mach-ath79 | ||
mach-au1x00 | ||
mach-bmips | ||
mach-pic32 | ||
config.mk | ||
Kconfig | ||
Makefile |